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  MCU Core
  80MHz, 1.56 DMIPS/MHz, 32-bit MIPS M4K Core
  5 Stage pipeline, Harvard architecture
  MIPS16e mode for up to 40% smaller code size
  Single cycle multiply and hardware divide unit
  32 x 32-bit Core Registers
  32 x 32-bit Shadow Registers
  Fast context switch and interrupt response
  MCU System Features
  64K Flash (plus 12K boot Flash)
  16K RAM (can execute from RAM)
  Flash prefetch module with 256 Byte cache
  Lock instructions or data in cache for fast access
  Programmable vector interrupt controller
  Analog Features
  Fast and Accurate 16 channel 10-bit ADC
  Max 1 Mega sample per second at +/- 1LSB, conversion available during SLEEP & IDLE
  Power Management Modes
  RUN, IDLE, and SLEEP modes
  Multiple switchable clock modes for each power mode, enables optimum power settings
  Debug Features
  8 hardware breakpoints (6 Instruction and 2 Data)
  2 wire programming and debugging interface
  JTAG interface supporting Programming, Debugging and Boundary scan
  Other MCU Features
  Fail-Safe Clock Monitor – allows safe shutdown if clock fails
  2 Internal oscillators (8MHz & 31KHz)
  Hardware RTCC (Real-Time Clock and Calendar with Alarms)
  Watchdog Timer with separate RC oscillator
  Pin compatible with 16-bit PIC? MCUs